An analog MOS switch, i.e. a MOS switch intended to transmit analog signals, generally functions by successively turning the MOS transistor on and off by biasing it sufficiently such that its drain-source resistance in the on state (commonly termed R.sub.on by those skilled in the art) is small in relation to the load capacitance (switched capacitance) connected on its drain, and to the frequency of the analog signal to be transmitted. In order for a MOS transistor to be on, it is necessary as a minimum for the gate-source voltage difference to exceed the threshold Vt of the transistor. Consequently, the analog signal to be transmitted cannot exceed the system supply voltage minus this threshold voltage. Moreover, because the analog input voltage modulates the gate-source voltage of the transistor, the resistance R.sub.on varies with the level, i.e. the amplitude, of the signal.
Although this variation is only slightly troublesome at low frequencies, it very quickly becomes disturbing and generates distortions at higher frequencies, for example at frequencies of the order of 100 MHZ, especially for high resolution, for example 10 bits in an analog/digital (A/D) converter application, with this elevated frequency. Stated otherwise, the distortion, caused by the variation in resistance R.sub.on, is manifested as nonlinear restoration of the signal by the switch, in terms of amplitude and phase. Additionally, the larger the amplitude of the input signal, the larger this distortion since the resistance R.sub.on is inversely proportional to the level of the input signal.
An approach which has already been envisaged includes controlling the switch digitally, i.e. with a logic signal exhibiting a high level and a low level, and by using a particularly elevated high level, for example of the order of twice the supply voltage. This makes it possible to minimize the variations in the level of the input signal, but such a solution is not applicable to the technologies currently envisaged in microelectronics, such as 0.25 micron or 0.18 micron, or even more miniaturized technologies.
Dimensioning approaches may also be envisaged to decrease the product R.sub.on.times.C1, where C1 denotes the capacitive value of the load capacitance. However, in most cases, C is imposed by other design constraints, such as noise and consumption, thereby leading to the need to decrease R.sub.on. However, decreasing this resistance amounts to increasing the size of the transistor forming the switch, and hence to increasing in particular the stray capacitance of the device.